1. Field of the Invention
The present invention relates to a cascode circuit, and more particularly, to a cascode circuit operating at less than 1 V (i.e., sub-1 V) and an amplifier including the same.
2. Description of the Related Art
Cascode circuits are usually used for circuit applications requiring high output impedance (or resistance).
FIG. 1 illustrates a conventional cascode circuit 10 that includes a current source I1, a first N-channel metal-oxide semiconductor field-effect transistor (NMOS FET) 12, and a second NMOS FET 14. The cascode circuit 10 amplifies an input voltage Vin to generate an output voltage Vo. To allow constant current to flow in the second NMOS FET 14, a bias voltage Vb is applied to a gate of the second NMOS FET 14.
Since the first NMOS FET 12 and the second NMOS FET 14 are connected in series in a stack structure, the output resistance of the cascode circuit 10 is always high at a drain (i.e., an output terminal Vo) of the second NMOS FET 14.
However, satisfactorily high output resistance can not be obtained with only the cascode circuit 10 because a channel length modulation effect is reduced due to the scale-down of semiconductor processes.
FIG. 2 illustrates a conventional regulated cascode circuit 20 that includes a gate of a third NMOS FET 16 connected to a node N1 and a gate of the second NMOS FET 14 connected to a node N2. The output resistance of the regulated cascode circuit 20 is several tens of times higher than that of the cascode circuit 10. However, since the regulated cascode circuit 20 has a loss in an output voltage swing by a threshold voltage as compared to the cascode circuit 10, it is not suited for use at a low voltage of less than 1 V.
Moreover, a power supply rejection ratio (PSRR) of the regulated cascode circuit 20 is degraded due to noise in power lines receiving a power supply voltage Vdd and a ground voltage Vss, respectively. The regulated cascode circuit 20 includes the third NMOS FET 16 operating in a weak inversion region to compensate for the loss of the threshold voltage in the output voltage swing. In this case, the loss in the output voltage swing is minimized, but it is difficult to use the regulated cascode circuit 20 in other circuits due to operational instability, an increasing area, and degradation of the PSRR.